A "naked" portafilter is one that has the bottom of the basket exposed. This:
- allows the coffee to come out without hitting additional metal, and so is supposed to keep at a more consistant temperature.
- preserves more of the crema as the bubbles don't burst when hitting the spigot.
- allows you to better see the extraction process and so get better / more consistent shots.
- looks really cool!
After spending a long time trying to find the perfect naked portafilter for our machine (Uniq Rumba) I ended up deciding to just make one. This is documented below.
Start off by removing the plastic handle, metal bar handle and spigot. This can by difficult as they are dissimilar metals and so may have corroded together. I used a bunch of penetrating oil and then had to heat the spigot with a pencil torch.
We want to remove the entire center section, so drill a bunch of close / overlapping holes. I did not have a centering bit, so I just placed them as close as possible to each other and then broke away the material between them with an old screwdriver bit (a bunch was too large).
To make this simpler / faster you can make a jig out of a piece of wood and a bolt though the spigot hole - this will allow you to drill, rotate, drill rotate and get all of the holes nicely lined up. I didn't do this, but really should have!
Now place the portafilter (without the metal handle!) on a lathe and machine away the excess material. I used a Central Machinery 7" X 10" Precision Mini Lathe. Something larger / more powerful would have made the process faster, but this worked ok. Running some fine sandpaper (on a dowel or similar) around the machined edge (while turning on the lathe) makes short work of tidying up the sharp edges, removing burrs and polishing the work.
Now simply reasemble
The ICOM IC7000 is a great little HF/VHF/UHF transceiver. It has many of the features of my IC7800, but in a smaller, easier to use form factor.
It also has an undocumented feature that the IC7800 doesn't -- it's a portable TV set!
Unfortunately, now that TV has moved to digital this doesn't really accomplish anything, but, well, I figured I might as well enable it anyway.
Here are some photos from the hack.
I recently donated a whole bunch of Dell server to ISC to help upgrade f.root-servers.net.
They all had Dell DRAC4 cards in them and I wanted to reset them to a known config before donating them.
Dell does provide some Linux software to talk to the cards, but is is mostly binary packages that run under RedHat Enterprise server or CentOS. Various folks have managed to make racadm and the other tools work under other distributions, but it is a headache to setup.
I needed to wipe and stage 50 servers or so and I wanted to be able to do it in as simple a manner as possiable. I didn't want to have to wipe the drives, install CentOS, wipe the DRAC card, then reinstall with the real OS, so I ended up writing the below code. It will talk to the DRAC card over the internal serial port and should run on any OS (including FreeBSD and netBSD) that run Python.
So I have been a ham operator since 1997. I recently decided to upgrade from Technician to Amateur Extra, so I read though some of the online stuff and took a practice test or two. I went along to the local hamfest and discovered that I had to take the General exam before being allowed to take the Amateur Extra exam. I hadn't studied for the General license at all and failed miserably . The following weekend I traveled to Stockholm for IETF75 which gave me a few uninterrupted hours on the plane to read through the General material as well. I got back to VA late on Saturday and went to the West Friendship, MD hamfest on Sunday morning. I wasn't expecting there to be quite so many people taking the exam so I didn't arrive as early as I should have. I took the General Exam and waited for what felt like hours while to was graded. I passed that and thanks to some quick grading by the Laurel VEC team I managed to take and pass the Extra class exam in the last 15 minutes before they closed.
So, I am now a licensed Amateur Extra and have applied for a new callsign, which looks like to will be approved, so I will probably be changing from KC2BOB to AC4WK.
While going through some old electronics I found a pager that I wasn't using any more and I decided that it would be interesting to see if there was still any data being transmitted on the pager networks -- I also decided that a pager would make a really good remote receiver for things like home automation. They are fairly cheap, get reasonable reception in most places and (internally at least) have a digital signal.
I popped it open and looked around to see if I could find a decoded digital signal, but it looks like there is basically an RF section that feeds a single processor that does of decoding, checking for address match, etc. I briefly considered trying to find a JTAG type interface, pull the firmware, disassemble it, etc but that sounded like way more scrummaging and groveling than I wanted to do. I decided to instead just read the output of the FSK IF detector and implement the FLEX or POCSAG in software -- this would allow me much greater flexibility in the future as I could create my own network, watch messages (obviously only ones that I sent, reading messages for other folks is illegal), etc. Initially I figured I could just hook a microprocessor to the output of the FSK IF detector (a Toshiba TA31149FNG) and bit-bang the input. After reading the TA31149 data-sheet I discovered that it is a 4-level FSK and not a 2-level FSK. While I could still do this with a microprocessor I decided that the timing might become a little hairy, so I decided to take the 2-bit output of the 4-level FSK and use an FPGA to convert it to a RS-232.
I have some of the really nice Pluto-II FPGA development boards from www.knjn.com -- they have an Altera's Cyclone EP1C3T100 and a 1Mbits FPGA boot-PROM. They also are programmable through a serial port and Altera has a free set of development tools. After some poking I managed to implement a very simple phase locked loop in the FPGA that takes the 2-bit output, removes some noise (the FPGA liked to clock on the overshoot, noise, etc), collect 4 samples (2 bits per sample) and then output TTL level RS-232 which I can then do more decoding with later.